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| General Description The IP00C711 (SCREEN3) is a highly integrated device for real-time color image scaling and frame rate conversion up to SXGA resolution. The IP00C711 supports all the critical functions required in any display control logic: image scaling, frame rate conversion and de-interlacing. Ideally suited for driving LCD displays, video walls and projectors, the IP00C711 uses a proprietary pixel interpolation technique for producing images of the highest quality. The IP00C711 can be used in a wide variety of applications, thanks to its very flexible architecture that supports both standard and custom image formats. For processing video signals, the IP00C711 interfaces directly to any video decoder chip and achieves de-interlacing by line interpolation or field merging. With independent clock and synchronization signals for the input and output ports, the IP00C711 can perform image scaling even when the input and output images have different frame rates. w w w .d ee sh ta a u. t4 * * * * * Applications Flat-Panel Displays Projection Systems Video Walls LCD/TV Monitors Plasma Displays om c Support Tools * * * * IP00C711 Data Sheet and Application Notes EVB711AD Evaluation Board Example register settings for typical operating modes Technical Support by highly qualified engineers www..com IP00C711 Features Input Image Formats RGB 48-bit (2 pixels/clock) at 160 Mpixels/sec. RGB 24-bit (1 pixel/clock) at 90 Mpixels/sec. YUV4:2:2 (16 bits) at 80MHz Image size up to 2400 pixels horizontally with 1920 pixels of active video * Interlaced or non-interlaced * External synchronization (HSync, VSync, CLK) * * * * Frame Rate Conversion * Asynchronous operation of the input and output ports * Frame synchronization function to avoid frame tearing Other Features * * * * * * * 16-color OSD support Auto-detection of input image format Gamma correction Brightness and contrast adjustments YUV to RGB color conversion 10 to 8-bit conversion 8 to 6-bit conversion Output Image Formats * RGB 48-bit (2 pixels/clock) at 108 Mpixels/sec. * RGB 24-bit or 30-bit (1 pixel/clock) at 70 Mpixels/sec. * External or internal synchronization modes CPU Interface * 4-wire serial bus Scaling * * * * * * * * * Independent horizontal and vertical scaling ratios Programmable interpolation coefficients Non-linear scaling Keystone correction 16:9 to 4:3 conversion SDRAM or SGRAM external frame memory 48-bit wide memory bus 128 Mbytes of addressable image memory Direct access to image memory from the CPU Power Supply Voltage * 3.3V single source Package * PQFP-256 pins (0.4 mm pitch) Image Memory |
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